SUMIT GUPTA

Software Engineer

Delhi, India3 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expert in Universal Verification Methodology (UVM) for design verification.
  • Strong foundation in microelectronics from BITS Pilani.
  • Proficient in multiple hardware verification tools and languages.
Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in hardware verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)

Other Skills

MVMAMBA APBFunctional VerificationLinuxHardware VerificationAMBAPython (Programming Language)AMBA AHBFormal VerificationJasperGoldSystemVerilogC++VerilogDigital Circuit DesignAnalog Circuit Design

Experience

3 yrs 9 mos
Total Experience
3 yrs 9 mos
Average Tenure
3 yrs 9 mos
Current Experience

Mediatek

2 roles

Senior Design Verification Engineer

Promoted

Jul 2022 – Present · 3 yrs 9 mos · Bengaluru, Karnataka, India

Universal Verification Methodology (UVM)MVM

Design verification

Jan 2022 – Jun 2022 · 5 mos · Bengaluru, Karnataka, India

Education

Birla Institute of Technology and Science, Pilani

M.E — MICROELECTRONICS

Jan 2020 – Jan 2022

Guru Tegh Bahadur Institute Of Technology

B.TECH — ELECTRONICS AND COMMUNICATION

Jan 2014 – Jan 2018

K.V sector-03 rohini delhi

12th — Non medical (PCM)

Jan 2012 – Jan 2013

K.V sector -22 rohini delhi

10th

Jan 2010 – Jan 2011

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