Arunkumar Thanaprakasam

Software Engineer

Bengaluru, Karnataka, India12 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 12 years in design verification.
  • Expertise in LTE and SoC verification.
  • Senior Staff Engineer at MediaTek.
Stackforce AI infers this person is a Design Verification Engineer specializing in LTE and SoC technologies.

Contact

LinkedIn

Skills

Core Skills

InfraIp Verification

Other Skills

HDMISystem verilogUniversal Verification Methodology (UVM)PerlLinuxSoc VerificationUSB 2.0SDIOAMBALTESVAMBA AHBAXIVerdi

About

12+ Years of experience in Design verification(Lte & IP, Noc and SoC)

Experience

12 yrs
Total Experience
4 yrs
Average Tenure
6 yrs 10 mos
Current Experience

Mediatek

3 roles

Senior Staff Engineer

Jul 2024 – Present · 1 yr 9 mos

Infra

Staff Engineer

Promoted

Jun 2020 – Present · 5 yrs 10 mos

InfraIP Verification

Senior Engineer

Mar 2019 – Mar 2020 · 1 yr · Bengaluru, Karnataka, India

IP Verification

Synapse design inc.

Module Lead

Jul 2017 – Feb 2019 · 1 yr 7 mos · India

Wireless startup

Development Engineer

Nov 2013 – Jun 2017 · 3 yrs 7 mos · Chennai Area, India

Education

Anna University Chennai

Bachelor of Engineering (B.E.)

Jan 2009 – Jan 2013

Care well Matriculation Higher secondary school

Jan 2007 – Jan 2009

Stackforce found 100+ more professionals with Infra & Ip Verification

Explore similar profiles based on matching skills and experience

Srikanth Kotra

Srikanth Kotra

Senior Manager in AMD India Pvt Ltd

at AMD

Hyderabad, India20 yrs 6 mos exp
SOC verificationPre-silicon verification
Ullattil Shiju

Ullattil Shiju

Department Manager, WCT DV2 Team

at MediaTek

Bengaluru, India23 yrs 2 mos exp
Functional VerificationSoC
James George

James George

Senior Lead Engineer

at Qualcomm

Bengaluru, India10 yrs 6 mos exp
Design Verification
Ling J.

Ling J.

Tech Recruiting

at Perplexity

San Francisco, United States13 yrs 5 mos exp
Technical Recruiting
Abbas Soni

Abbas Soni

Principal Software Engineer

at Cadence Design Systems

Ahmedabad, India12 yrs 8 mos exp
Devesh Kumar

Devesh Kumar

Principal Design Engineer

at Cadence Design Systems

Delhi, India14 yrs 9 mos exp
Functional VerificationOpen Verification MethodologySystemVerilogVHDLVMM
AP

Anmol Passi

Accumulated Expertise

at Career-Wide Experience

Mandi, India0 mo exp
AI ProductsHealth & Wellness Tech
GK

Gaurav Kumar

Accumulated Expertise

at Career-Wide Experience

Indore, India0 mo exp