MURALI KILARI

Director of Engineering

Andhra Pradesh, India18 yrs experience
Highly Stable

Key Highlights

  • Experienced in Functional Verification and SystemVerilog.
  • Strong background in the Semiconductors industry.
  • Proven leadership as Design Engineering Manager at AMD.
Stackforce AI infers this person is a Semiconductor Engineering Manager with expertise in Functional Verification and VLSI design.

Contact

Skills

Core Skills

Functional VerificationSystemverilog

Other Skills

VerilogFPGASoCI2CDFTX86ASICStatic Timing AnalysisRTL designVLSITCLC (Programming Language)Very-Large-Scale Integration (VLSI)Open Verification Methodology

About

Experienced Engineer with a demonstrated history of working in the Semiconductors industry. Strong engineering professional skilled in Functional Verification, Verilog, SystemVerilog,UVM

Experience

18 yrs
Total Experience
6 yrs 7 mos
Average Tenure
4 yrs 10 mos
Current Experience

Amd

Design Engineering Manager

Jun 2021Present · 4 yrs 10 mos · India

Functional VerificationSystemVerilogVerilog

Invecas

2 roles

Senior Member Of Technical Staff

Apr 2018Jun 2021 · 3 yrs 2 mos

MTS

Apr 2015Apr 2018 · 3 yrs

Soctronics

2 roles

Senior Asic Engineer

Promoted

Apr 2009Apr 2015 · 6 yrs · Hyderabad Area, India

Design Engineer-II

Apr 2008Apr 2009 · 1 yr · Hyderabad Area, India

Education

VEDA IIT

MS — VLSI

Jan 2006Jan 2008

Bapatla Engineering College

B.Tech — ECE

Jan 2001Jan 2005

Bhashyam Public School

Jan 1997Jan 1999

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