Nandini Lingolu

DevOps Engineer

Bengaluru, Karnataka, India6 yrs 1 mo experience
Most Likely To Switch

Key Highlights

  • Experienced in digital electronics and verification methodologies.
  • Proficient in Verilog and SystemVerilog for design verification.
  • Strong foundation in electronics and communication engineering.
Stackforce AI infers this person is a Design Verification Engineer with expertise in digital electronics and verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Digital ElectronicsUniversal Verification Methodology (uvm)

Other Skills

VerilogSystemVerilogC (Programming Language)Python (Programming Language)Microsoft WordMicrosoft ExcelMicrosoft PowerPoint

Experience

6 yrs 1 mo
Total Experience
2 yrs
Average Tenure
2 yrs 1 mo
Current Experience

Intel corporation

SOC DESIGN VERIFICATION ENGINEER

Mar 2024 – Present · 2 yrs 1 mo · Bengaluru, Karnataka, India · Hybrid

Digital ElectronicsVerilogSystemVerilogUniversal Verification Methodology (UVM)

Capgemini engineering

Design Verification Engineer

Apr 2021 – Mar 2024 · 2 yrs 11 mos · Bangalore

Maven silicon

Trainee

Dec 2019 – Jan 2021 · 1 yr 1 mo · Bengaluru, Karnataka, India

Education

Bonam Venkata Chalamaiah Institute of Technology And Science, Amalapuram

Bachelor's of Technology — Electronics and Communication Engineering

Jan 2015 – Jan 2019

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