Pratyush Agarwal

Software Engineer

India4 yrs 4 mos experience

Key Highlights

Experienced in RTL design and debugging.
Proficient in multiple EDA tools.
Strong foundation in analog and digital electronics.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in RTL design and verification.

Contact

Skills

Core Skills

Rtl DesignDebugging

Other Skills

QuestaSimRTL Design and DebuggingXilinx VivadoCadence VirtuosoC (Programming Language)VerilogVHDLIntel 8085MATLABAnalog Circuit DesignDigital ElectronicsAnalog CircuitsCMOSSystemVerilog

Experience

4 yrs 4 mos

Total Experience

11 mos

Average Tenure

9 mos

Current Experience

Amd

Sr. Silicon Design Engineer

Jul 2025 – Present · 9 mos · India

Qbit labs private limited

2 roles

R&D Engineer 2

Apr 2023 – Jul 2023 · 3 mos · Gurugram, Haryana, India

FPGA R&D Engineer

Dec 2021 – Mar 2023 · 1 yr 3 mos · Gurugram, Haryana, India

QuestaSimRTL DesignDebugging

Steradian semiconductors

2 roles

Consultant

Aug 2021 – Dec 2021 · 4 mos

Embedded Firmware Engineering Intern

Mar 2021 – Jul 2021 · 4 mos

Iete student's chapter bit mesra

2 roles

Alumni Relations Manager

Jul 2020 – Jul 2021 · 1 yr · Jharkhand, India

Workshop Head at ECE Society,BIT Mesra

Workshop Coordinator

Jul 2019 – Jul 2020 · 1 yr · Jharkhand, India

Ece society, bit mesra

2 roles

Workshop Head

Jul 2020 – Jul 2021 · 1 yr · Jharkhand, India

Workshop Coordinator

Jul 2019 – Jul 2020 · 1 yr · Jharkhand, India

Education

Indian Institute of Technology, Kanpur

Master of Technology - MTech — Signal Processing and Communication

Jul 2023 – Jul 2025

BIT Mesra Student-Industry Relations Cell

Bachelor of Engineering — Electronics and Communication Engineering

Jan 2017 – Jan 2021

Dr Virendra Swarup Memorial Public School

Jan 2004 – Jan 2016

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