NITIN JAIN — Software Engineer

Varied and in depth experience of 10+ years in field of SoC/Sub System/IP verification and Design. > Domain Expertise in Functional(Directed/Random) and Gate level verification at SoC level involving testplan creation,development and execution. > System level performance evaluation/correlation on RTL.. > Good understanding of SoC platform architectures involving data path,clock,reset and low power. > SoC verification on Processors,Caches,System Interconnect,System boot,PCIe,Ethernet,Layer 2 Switch,Data path accelerators and generic peripheral blocks like I2C and TDM. > In depth knowledge/working experience on AXI/AHB and Freescale Internal protocols for on chip communication. Key Skills and Knowledge Domain :- ✦ Pcie Gen5/Gen6 Physical layer verification - In depth protocol knowledge and IP level verification of PCIe Gen5 /Gen6 Physical Layer ✦ Ethernet verification. - Involved in verification of Data path accelerator blocks covering from testplan creation to coverage closure. - In depth protocol knowledge of RGMII,SGMII,QSGMII and XFI(10 gig Ethernet) and associated concepts involving 8b/10b encoding,clause 37 auto-negotiation,clause 73 negotiation,Start-up protocol etc. - Verification ownership experience of first time integrated IPs at SoC. Owned SoC verification of Layer 2 Switch. In depth knowledge of layer 2 features such as Mirroring,Broadcasting,CPU copy, Vlan based switching,ACLs,Link aggregation etc. ✦ E500v2 Core and Cache verification. - verification of e500v2 core, L2 cache,System Interconnect and Arbiter at SoC. - Experience of coding in assembly language. - Single/Dual core boot. - Core low power modes - Secure boot and trust architecture verification. - Multi core coherency, snooping, stashing, MESI etc. ✦ SoC random verification. - Random environment creation and execution for stress testing of central platform architecture and associated gaskets and slaves. ✦ Verification of peripheral blocks such as I2C and TDM.

Stackforce AI infers this person is a specialized engineer in semiconductor verification and design.

Location: Bengaluru, Karnataka, India

Experience: 17 yrs 6 mos