SONU SINGH

Software Engineer

Bengaluru, Karnataka, India7 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expert in Physical Design and Digital IC Design.
  • Proficient in TCL scripting for timing convergence.
  • Strong background in semiconductor device modeling.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Digital IC methodologies.

Contact

Skills

Core Skills

Physical DesignDigital Ic Design

Other Skills

VerilogTCLLinuxLow-power DesignInnovusPRIME TIMECALIBREC (Programming Language)Digital Circuit DesignSemiconductor Process TechnologyXilinx ISEMicrosoft OfficePublic SpeakingMicrosoft ExcelMicrosoft Word

About

Skilled in Design &Implementation and Physical Design, Sign-off Analysis and scripting languages like TCL ,Python,shell.Strong information technology professional graduated from Motilal Nehru National Institute Of Technology. Role:Currently working as design and implementation engineer. Key responsibility: 1:Synthesis(dc,dcg,fc,genus) 2:CLP 3:FV 4:STA Past Role: Worked as physical Design intern in Qualcomm Key responsibility from floorplanning to sign off analysis. 1: Full-Chip from netlist to GDS. Develops solutions for physical convergence of blocks. 2: Implement floor-planning, block-level subsystem partitioning and budgeting. Power grid, signal track definitions, power planning. 3: Done placement&routing with clock tree analysis. And timing convergence with Tcl scripting, with cross talk and AOCV/POCV. 4: Done sign-off analysis with prime time (timing sign-off), calibre (physical verification sign off). 5: Done Tcl scripting for timing convergence.

Experience

7 yrs 7 mos
Total Experience
7 yrs 7 mos
Average Tenure
7 yrs 7 mos
Current Experience

Qualcomm

4 roles

Senior Lead Hardware Implementation Engineer

Nov 2024Present · 1 yr 5 mos

VerilogTCLLinuxPhysical DesignDigital IC DesignLow-power Design+3

Senior Hardware Implementation Engineer

Promoted

Jan 2022Nov 2024 · 2 yrs 10 mos

VerilogTCLLinuxPhysical DesignDigital IC DesignLow-power Design+3

Hardware Implementation Engineer

Jul 2019Apr 2022 · 2 yrs 9 mos

VerilogTCLLinuxPhysical DesignDigital IC DesignLow-power Design+3

Physical Design Intern

Aug 2018Jun 2019 · 10 mos

TCLPhysical Design

Education

Motilal Nehru National Institute Of Technology

M.Tech:Microelectronics & VLSI Design

Jan 2017Jan 2019

IMS ENGINEERING COLLEGE, GHAZIABAD

B.TECH — ELECTRONICS & COMMUNICAIONS

Jan 2011Jan 2015

G.N National Public School ,Gorakhpur

INTERMEDIATE

Jan 2009Jan 2010

Nav Jeevan Mission School ,Kushinagar

HIGH SCHOOL

Jan 2007Jan 2008

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