YOGESH MANJUNATH

Software Engineer

Bengaluru, Karnataka, India9 yrs 7 mos experience

Highly Stable

Key Highlights

Expert in Static Timing Analysis and Physical Verification.
Proven track record in leading engineering projects.
Strong background in VLSI design and simulation tools.

Stackforce AI infers this person is a VLSI design expert with a focus on physical verification and timing analysis.

Contact

Skills

Core Skills

Static Timing AnalysisPhysical Verification

Other Skills

Cadence VirtuosoAMS SimulationVerilogShell ScriptingPerlCcadence SKILLcalibreinnnovusCadence Encounter

Experience

9 yrs 7 mos

Total Experience

2 yrs 11 mos

Average Tenure

8 mos

Current Experience

Mediatek

Senior Staff Engineer

Sep 2025 – Present · 8 mos · Bengaluru, Karnataka, India

Static Timing Analysis

Qualcomm

2 roles

Senior Lead Engineer

Dec 2022 – Aug 2025 · 2 yrs 8 mos · Bengaluru, Karnataka, India

Physical VerificationStatic Timing Analysis

Senior Engineer

Jul 2020 – Dec 2022 · 2 yrs 5 mos · Bengaluru, Karnataka, India

Physical VerificationStatic Timing Analysis

Leadsoc technologies india pvt ltd

2 roles

Engineer II

Promoted

Oct 2018 – Jun 2020 · 1 yr 8 mos

Engineer

Aug 2017 – Sep 2018 · 1 yr 1 mo

Nxp acquires freescale semiconductor

Internship

Jun 2016 – Jul 2017 · 1 yr 1 mo · Noida Area, India

Education

Manipal Academy of Higher Education

Master of Engineering (MEng) — VLSI DESIGN

Jan 2015 – Jan 2017

Visvesvaraya Technological University

Bachelor of Engineering (BE)

Jan 2011 – Jan 2015

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