sandeep Acharya

Software Engineer

Hyderabad, Telangana, India5 yrs 1 mo experience
Most Likely To Switch

Key Highlights

  • 3+ years in Analog Mixed Signal IP design.
  • Expertise in 6nm to 40nm CMOS technology.
  • Proficient in full development cycle from definition to release.
Stackforce AI infers this person is a skilled Analog Design Engineer with expertise in healthcare technology applications.

Contact

sandeep.durga1992@gmail.comLinkedIn

Skills

Core Skills

Analog DesignAnalog VerificationAnalog Circuit Design

Other Skills

LeadershipMixed Signal DesignReliability AnalysisMonte Carlo AnalysisCMOS DesignImage Sensor TechnologyAMSTeam LeadershipAnalog LayoutDigital IC Designasic designScriptingVerilogStatic Timing AnalysisRTL Coding

About

Analog design and verification in 6nm,16nm ,28nm and 40nm CMOS Technology node.3+ years professional experience in Analog Mixed Signal IP design as well as verification development and full development cycle of PVT corners from definition to release.

Experience

5 yrs 1 mo
Total Experience
10 mos
Average Tenure
1 yr 11 mos
Current Experience

Amd

Senior silicon design engineer

May 2024 – Present · 1 yr 11 mos · Hyderabad, Telangana, India · Hybrid

Leadic design pvt ltd

Analog Design Engineer

Jan 2024 – May 2024 · 4 mos · Bengaluru, Karnataka, India · On-site

Synapse design inc.

Analog Design Engineer

Jun 2022 – Dec 2023 · 1 yr 6 mos · Bengaluru, Karnataka, India · Hybrid

  • Working on AFE (LNTA, Mixer, Attenutaor) Block in MRI application.
  • Working on LVDS in TX side .
LeadershipAnalog Design

Intel corporations as client

Analog CAD engineer

Dec 2021 – Jun 2022 · 6 mos · Bengaluru, Karnataka, India

  • Working on Analog circuit flow like reliability, probing and MC analysis also.

Cientra (an iso 9001:2015 company)

Computer Aided Design Design Engineer

Jun 2021 – Dec 2021 · 6 mos · Bengaluru, Karnataka, India

Department of electrical engineering, iit jodhpur

Research Assistant

Feb 2021 – Jun 2021 · 4 mos · Jodhpur, Rajasthan, India

  • Design of Programmable CMOS Image Sensor for high speed , low power and low noise application.

Infineon technologies

Analog Design Engineer

Jul 2019 – Jun 2020 · 11 mos · Bangalore

Education

Vellore Institute of Technology, Vellore

Master of Technology - MTech — VLSI DESIGN

Jan 2018 – Jan 2020

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