S

seshu charan

Software Engineer

Bengaluru, Karnataka, India7 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in Static Timing Analysis and Timing Closure.
  • Proficient in Logic Synthesis for complex designs.
  • Experience in resolving clock skew issues in high-performance circuits.
Stackforce AI infers this person is a VLSI Design Engineer specializing in Static Timing Analysis and Logic Synthesis.

Contact

Skills

Core Skills

Timing ClosureLogic Synthesis

Other Skills

Static Timing Analysis

About

Working in the Integration and STA team at Mediatek. My work is mainly focused on Static Timing Analysis which include setting up the stable STA environment with all required inputs, checking SDC issues. Analyzing setup, hold, transition, crosstalk, min period/pulse & glitch violations. Analyzing detours and region location for instances in clock path to resolve clock skew issues. Also worked on Tweaker fixing for setup, hold and data transition issues. Worked in synthesis and QC (LEC & CLP) for Serializer & Deserializer (SerDes) Block.

Experience

7 yrs 8 mos
Total Experience
6 yrs 1 mo
Average Tenure
1 yr 7 mos
Current Experience

Samsung semiconductor

Senior Staff Engineer

Sep 2024Present · 1 yr 7 mos · Bangalore Urban, Karnataka, India

Mediatek

3 roles

Staff Engineer

Jun 2023Sep 2024 · 1 yr 3 mos · Bengaluru, Karnataka, India · Hybrid

Timing ClosureLogic Synthesis

Senior Engineer

Promoted

Jul 2019Jun 2023 · 3 yrs 11 mos · Bengaluru, Karnataka, India · Hybrid

Timing ClosureLogic Synthesis

Engineer

Jul 2018Jun 2019 · 11 mos · Bengaluru, Karnataka, India · Hybrid

Education

National Institute of Technology Karnataka

Master's degree — VLSI Design

Jan 2016Jan 2018

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