DIVYASHREE SHETTY

Software Engineer

Bengaluru, Karnataka, India8 yrs experience
Highly Stable

Key Highlights

  • Expert in Physical Verification and DRC resolution.
  • Proven track record in optimizing physical design.
  • Strong collaboration with design teams for quality tapeout.
Stackforce AI infers this person is a Semiconductor expert with strong skills in Physical Design and Verification.

Contact

Skills

Core Skills

Physical VerificationTiming AnalysisSoc DesignPhysical DesignDrc And Lvs Resolution

Other Skills

Setup fixMacro placement optimisationICVDesign Rule Checking (DRC)Layout Versus Schematic (LVS)ANTENNADensity

Experience

8 yrs
Total Experience
7 yrs 6 mos
Average Tenure
6 mos
Current Experience

Mediatek

Staff Engineer ( Physical Verification)

Nov 2025Present · 6 mos

Timing analysisSetup fixMacro placement optimisationICVDesign Rule Checking (DRC)Layout Versus Schematic (LVS)+4

Intel corporation

2 roles

SoC Design Engineer

Jun 2021Aug 2025 · 4 yrs 2 mos · India · On-site

  • Worked on complete section-level execution of the project, including block integration, applying top-level LVS/DRC fixes, coordinating daily with design teams, and collaborating with leads to ensure quality tapeout within schedule.
  • Physical design contributions - Worked on physical design optimization by creating EBB component DEFs using fan-in/fan-out analysis, performing setup timing analysis with effective fixes, and resolving routing shorts in congested regions through placement and routing enhancements
ICVDesign Rule Checking (DRC)SoC DesignPhysical Design

Physical verification engineer

Feb 2018Jun 2021 · 3 yrs 4 mos · India · On-site

  • Successfully contributed to multiple tapeouts across various technology nodes, working as a Partition Execution Owner for different design blocks.
  • Proficient in resolving DRC, LVS, Antenna, and Density violations, ensuring clean signoff closure.
  • Worked across multiple hierarchical levels including block, section, and super-section level integration.
  • Worked on multiple ECOs involving Calibre, timing fixes, and RV-related fix.
ICVDesign Rule Checking (DRC)Physical VerificationDRC and LVS resolution

Education

Nitte Meenakshi Institute of Technology

Bachelor of Engineering - BE

Aug 2013Aug 2017

Stackforce found 100+ more professionals with Physical Verification & Timing Analysis

Explore similar profiles based on matching skills and experience