Keerthi Mikkal

CEO

Bengaluru, Karnataka, India8 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expertise in LPDDR5 memory technology.
  • Strong background in timing analysis and validation.
  • Proven experience in semiconductor industry roles.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in memory subsystem development.

Contact

LinkedIn

Skills

Core Skills

TimingStatic Timing Analysis

Other Skills

DDR3DDR4Python (Programming Language)SerDesSilicon ValidationDRAMCharacterizationPHYSignal IntegrityRTL CodingLogic SynthesisDDR

About

Emulation engineer at Qualcomm working on LPDDR5

Experience

8 yrs 9 mos
Total Experience
2 yrs 2 mos
Average Tenure
--
Current Experience

Intel corporation

Memory Subsystem Design

Feb 2024 – Apr 2026 · 2 yrs 2 mos

Qualcomm

2 roles

Senior Engineer

Nov 2022 – Jan 2024 · 1 yr 2 mos

TimingStatic Timing Analysis

RTL Design Engineer

Sep 2020 – Nov 2022 · 2 yrs 2 mos

  • Working on LPDDR5
TimingStatic Timing Analysis

Broadcom inc.

Engineer

May 2019 – Sep 2020 · 1 yr 4 mos · India

Rambus

Associate MTS

Jun 2017 – May 2019 · 1 yr 11 mos · Bengaluru, Karnataka, India

  • Working on Post Silicon Validation of Memory and Serdes.

Education

RV College Of Engineering

BE - Bachelor of Engineering — Electronics and Telecommunications

Jan 2013 – Jan 2017

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