Abhigna Kakumanu — Software Engineer
An agile, resilient and optimistic personality, interested in Digital domain VLSI.
Stackforce AI infers this person is a VLSI design engineer with expertise in static timing analysis and digital electronics.
Location: Hyderabad, Telangana, India
Experience: 3 yrs 6 mos
Skills
- Very-large-scale Integration (vlsi)
- Static Timing Analysis
- Sap Is-oil
Career Highlights
- Experienced in VLSI design and static timing analysis.
- Proficient in multiple EDA tools including Synopsys.
- Strong foundation in digital electronics and physical design.
Work Experience
MediaTek
Synthesis and STA Engineer (3 yrs 6 mos)
RV-VLSI VLSI and Embedded Systems Design Center
Physical Design Trainee (6 mos)
Accenture
Intern (2 mos)
Education
Bachelor of Technology - BTech at G Narayanamma Institute of Technology and Sciences
