Dharmendra Sharma

Software Engineer

Shikarpur, Uttar Pradesh, India8 yrs 4 mos experience
Highly Stable

Key Highlights

  • Post Graduate in Microelectronics from BITS Pilani.
  • Experienced in Silicon Design Engineering.
  • Strong foundation in semiconductor industry skills.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and physical design.

Contact

LinkedIn

Skills

Other Skills

CVerilogCadence VirtuosoVHDLCadence RC CompilerCadence SoC Encounter

About

I am a Post Graduate(ME) in Microelectronics from BITS Pilani, Pilani. I am open for positions in Semiconductor industry. I believe in hard work and acquire a zeal for constant learning.

Experience

8 yrs 4 mos
Total Experience
2 yrs 8 mos
Average Tenure
4 mos
Current Experience

Amd

MTS Silicon Design Engineer

Jan 2026 – Present · 4 mos

Synopsys inc

ASIC Physical Design Engineer

May 2022 – Jan 2026 · 3 yrs 8 mos · Bengaluru, Karnataka, India

Western digital

2 roles

Staff Engineer

Promoted

Sep 2021 – May 2022 · 8 mos

Senior Engineer, ASIC Development Engineering

Sep 2018 – Sep 2021 · 3 yrs

Cadence design systems

Intern

Jan 2018 – Sep 2018 · 8 mos · Bengaluru, Karnataka, India

Education

Birla Institute of Technology and Science, Pilani

Master of Engineering — Microelectronics

Jan 2016 – Jan 2018

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