jyotsna agrawal

Engineering Manager

Bengaluru, Karnataka, India13 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced Engineering Manager at NVIDIA.
  • Expert in CPU and DFD verification.
  • Strong background in ARM architecture and VLSI.
Stackforce AI infers this person is a semiconductor verification expert with extensive experience in CPU and SoC design.

Contact

LinkedIn

Skills

Other Skills

CSoCVerilogVLSIDebuggingData StructuresSystem on a Chip (SoC)Very-Large-Scale Integration (VLSI)ARM ArchitectureC++PerlSystemVerilogModelSimRTL DesignDV

Experience

13 yrs 10 mos
Total Experience
4 yrs 7 mos
Average Tenure
5 yrs 10 mos
Current Experience

Nvidia

2 roles

Engineering Manager

Promoted

Apr 2025 – Present · 1 yr 1 mo

Senior Verification Engineer

Aug 2020 – Apr 2025 · 4 yrs 8 mos

  • CPU, DFD verification
  • Formal verification
  • Working on cache coherency verification

Intel corporation

2 roles

Intel Architecture Core level PM verification engineer

Dec 2017 – Aug 2020 · 2 yrs 8 mos

  • Working on Power management verification of Intel CPUs

Design Engineer

Mar 2016 – Nov 2017 · 1 yr 8 mos

  • Working on UPI subsystem verification in Servers.

Qualcomm

2 roles

Engineer

Promoted

Apr 2014 – Feb 2016 · 1 yr 10 mos · Bangalore

  • Verification of SMMU (ARM IP) using transactors at SoC.
  • Verification of ARM CPUs

Associate Engineer

Jun 2012 – Apr 2014 · 1 yr 10 mos · Bangalore

  • Verification of Crypto, XPU(protection unit). I supported all security blocks verification on SoC across all projects.

Bharat electronics

Internship

Jun 2011 – Jun 2011 · 0 mo · ghaziabad

  • Got training in Radar, microwave communication in Department of BEL ghaziabad

Continental carbon india ltd

Summer Internship

Jun 2010 – Jun 2010 · 0 mo · Ghaziabad

  • Got a training in control and instrumentation.

Education

Motilal Nehru National Institute Of Technology

Bachelor of Technology (B.Tech.) — Electronics and Communication Engineering

Jan 2008 – Jan 2012

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