Satish Chandra Dixit — Software Engineer

> Currently working as a Staff Engineer in Qualcomm CPU PD team, having 12 years of experience in PD & STA, of High Performance CPU Subsystems, High speed IPs, frequency ranging from 500Mhz to 3.6+ Ghz. > Worked for 15+ tape outs for Tech Nodes- 60nm, 45nm, 40nm, 32nm, 28nm, 22nm, 14nm, 11nm, 8nm, 7nm, 5nm, 4nm and different technology variant like BCD, IMG, BICOMOS, FDSOI, FinFet. >Tools- Innovuus/ICC PrimeTime/Tempus, Tweaker, Redhawk, Calibre, Satr-RC/QRC , DC and Virtuoso. * Expertise in CPU subsystem level STA, timing closure methodologies, timing corners, modes and process variations and optimization. * Hands on experience on power recovery and signoff. * Expertise in PGV/rail aware STA at subsystem level. * Handled Sub-system level constraints clean up for multiple chips. * Worked on Complex subsystem interface timing closure and IO Budgeting. * Having architecture level understanding and data flow know how of ARM Cores A7/A55/A56/Clen/A73/A75/A78 and other high performance custom CPU-cores. * Abstraction expertise like Hyperscale/Context and ETM/SDF delivery. * Expertise in timing ECOs (Engineering Change Order) manually as well as using tools like PTECO/tempus/tweaker and coordinating with Frontend and Backend Designers to close timing. * Expertise in power recovery - leakage and dynamic using various tools. * Knowledge of low power techniques including clock-gating, power-gating and multi-voltage designs * Experienced with OCV/AOCV/POCV/LVF variations and margining. * Expertise in Clock tree analysis , DCD simulation and High frequency Clock tree signoff. * Participate in Mentoring new hires in the group on technical skills. * Provide inputs for CAD/DA team from Design Implementation perspective. * Part of various workgroups and initiatives to bring development and change into tool/flows/methodology. * Hands on experience on PNR and PV (complete RTL2GDS) closure for MSIP blocks. * Hands on experience for PDN closure for small blocks using Redhawk. * Good team player with good oral, written and verbal communication skill. Must be able to negotiate with cross-functional teams for convergence. * Work closely with Principal Engineer / Project leader for creating schedule, tracking and raising issues / risks to project management.

Stackforce AI infers this person is a Semiconductor Engineering expert with a focus on CPU design and physical verification.

Location: Noida, Uttar Pradesh, India

Experience: 12 yrs 4 mos