DEEPU JOSE

Product Manager

Edinburgh, Scotland, United Kingdom12 yrs 8 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Physical Design and Timing Analysis.
Proven track record in System on a Chip development.
Strong background in Microelectronics and Design Verification.

Stackforce AI infers this person is a Microelectronics expert with a focus on Physical Design and SoC development.

Contact

Skills

Other Skills

Design Verification TestingFloorplanningGDSMicroelectronicsPhysical DesignStatic Timing AnalysisSystem on a Chip (SoC)Timing ClosureVerification and Validation (V&V)

About

'Building a Chip is like building a City'

Experience

Allegro microsystems

2 roles

Principal Physical Design Engineer

Promoted

Jun 2025 – Present · 9 mos

Senior Physical Design Engineer

Feb 2022 – May 2025 · 3 yrs 3 mos

Infinecs systems sdn. bhd.

Staff Engineer

Jan 2021 – Dec 2021 · 11 mos · Bengaluru, Karnataka, India

Capgemini engineering

Lead Engineer

Feb 2019 – Jan 2021 · 1 yr 11 mos · Greater Coimbatore Area

Altran acquired by Capgemini Engineering.

Intel corporation

Physical Design Engineer

Sep 2017 – Dec 2018 · 1 yr 3 mos · Bengaluru, Karnataka, India · On-site

LakshSemi aquired by Intel Technology India Pvt. Ltd

Wipro

2 roles

Senior Hardware Engineer

Promoted

Aug 2015 – Aug 2017 · 2 yrs

Digital IC Design - Physical Design, Static Timing Analysis.

Hardware Engineer

Dec 2012 – Jul 2015 · 2 yrs 7 mos

Education

University of Bristol

Master’s Degree — Advanced Microelectronic Systems Engineering

Jan 2015 – Jan 2016

Mahatma Gandhi University

B-Tech — Electronics and Communications Engineering

Jan 2008 – Jan 2012

RMHSS Aloor

Higher Secondary

Jan 2006 – Jan 2008

St.Joseph's EMHSS Aloor

High School — High School/Secondary Certificate Programs

Jan 1994 – Jan 2006

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