Vinod S B — Software Engineer

As a Layout design engineer posses excellent skills in solving LVS, DRC, DFM, ERC, Soft-Check, IR drop analysis and Having good knowledge of SKILL coding, TCL and C coding. Worked on SRAM/MRAM Memory Layout Design with excellent knowledge in Memory Architecture and worked on Memory Compiler. Hands on experience on Layout Automation using Cadence SKILL coding. Worked on SerDes block at 16Ghz frequency rate, 2-16Ghz Clock generator Using current controlled Ring Oscillator, Comparator Block, Signal generated using Cascode Current Mirror and Differential Pairs. Worked on leaf cell to block level design of Memory Blocks with good understanding of top level architecture and meeting the design requirements. Worked on lower nodes like TSMC 5nmFinFet, TSMC 7nm FinFet, 3nm Nanosheet and Forksheet, samsung 28nm FDSOI. Quality Layout design with good understanding of Well proximity effect, LOD/STI, Latch-up, Antenna effects, EM, IR drop. Good Knowledge in CMOS fabrication Also possess knowledge of Circuit design, characterization of standard cells Strong engineering professional awarded with Gold Medal for academically securing Highest CGPA in Bachelors of Engineering - Electronics and Communication Engineering from NIE, Mysuru

Stackforce AI infers this person is a VLSI Design Engineer with a focus on memory architecture and layout automation.

Location: Bengaluru, Karnataka, India

Experience: 7 yrs 6 mos