Dec 2021 – Jul 2023 · 1 yr 7 mos · Odense, South Denmark, Denmark

Sep 2021 – Present · 4 yrs 7 mos · Remote

Sep 2019 – Oct 2019 · 1 mo · Copenhagen Area, Capital Region, Denmark

• I am on a short term research stay at Roskilde University visiting Professor John Gallagher. My affiliation continues to be with IIT Indore as Associate Professor. During this research visit, working on advancing the applicability of static analysis and abstract interpretation based model checking for analysis systems correctness. It falls under the broad area of formal methods and formal verification. Focus is on analysis of model-based techniques.

Jan 2012 – Present · 14 yrs 3 mos · Noida, India

• Reporting directly to Managing Director.
• i. Intellectual property generation
• One patent-filed in the area of mobile systems. An algorithm to discriminate between system rolled context switching and user-space controls;
• ii. Worked on a mobile platforms' common framework for banking solutions;
• iii. Liaising with Indian academia for research collaborations, paper reviewing etc.;

May 2011 – Nov 2011 · 6 mos · Bangalore, India

• A. Exploring rigorous mathematical modelling techniques for avionics i.e. embedded systems deployed in aerospace applications:
• i. Explored various static analyses and model checking tools applicable to avionics systems;

Oct 2010 – May 2011 · 7 mos · India (Bangalore, Hyderabad, Mumbai)

• Visited: TIFR Mumbai (Prof. P. Pandya), IIIT Hyderabad (Prof. V. Choppela), GM ISL (FV Lab) Bangalore, TRDDC (Prof. M. Joseph)

Nov 2005 – Dec 2005 · 1 mo

• Towards:
• A European Union – Information Society Technologies - Project titled “Advanced Specialisation and Analysis of Pervasive Systems”.
• Duties:
• Work package 5 of ASAP project involving Deliverable Nr. 19, specifically towards the Task 5.3 'Analysis of High Level Specification Languages'.

Jan 2004 – Oct 2010 · 6 yrs 9 mos

• Participated in the research efforts under the auspices of the EU-IST-Project titled “Advanced Specialisation and Analysis for Pervasive Systems” (ASAP)
• 1. ASAP-consortium included:
• (i) Computer Science department, University Of Southampton, England, UK,
• (ii) Computer Science department, Bristol University, England, UK,
• (iii) Computer Science department, Technical University of Madrid, Spain,
• (iv) Computer Science department, University of Düsseldorf, Germany and
• (v) Computer Science department, Roskilde University, Denmark;
• 2. Carried out doctoral research in the area of formal verification of embedded systems;
• 3. Two-month research stay at the Software Engineering Group of Professor
• Christo Angelov at University of Southern Denmark;
• 4. Lectured a graduate-level course titled “Introduction to parallel and distributed computing” worth 7.5 ECTS;
• 5. Supervised semester-level projects worth 15 ECTS each.
• Contributions:
• 1. Developed a framework that makes it possible to verify embedded systems against requirements specified in temporal languages.
• Developed tools such as: (i) a static analyser and (ii) an abstract interpretation -based model checker.
• 2. These tools are built around a state of the art SMT solver (called YICES) and a very efficient constraint library (called Parma Polyhedra Library (PPL)).
• 3. Developed systems' software, tools and compilers during the PhD period. Extended the CTL semantics to accommodate the Hybrid systems and built a compiler that translates a visual spec. into constraint model.
• 4. Co-authored 5 conference publications
• PhD Dissertation
• Published by Roskilde University Press with ISSN 0109-9779
• Advisor: Professor Dr. John P. Gallagher
• Title: Modelling and Analysis of Real-time Systems with Logic Programming and Constraints
• Key words: Semantics, Model checking, Static analysis, Partial evaluation, Program analysis, Program transformation, Real-time Embedded Systems, Rigorous Software Engg

Jan 2003 – Jun 2003 · 5 mos · Soenderborg, Denmark

• TA to graduate students in the laboratory sessions for Mechatronics engg. stream. This involved introducing the tools such as Atmel AVR micro-controllers programming with IAR WorkBench and GNUGCC compiler.
• 1. Designed and developed the HARTEXµ kernel with novel Boolean vector data structures and the sophisticated content-oriented message addressing, resulting in a very safe, very fast, yet very small (code foot print< 7KB and data memory < 200 bytes) kernel. This work is undertaken in my MSEngg dissertation. It is accessible via the citeseer link
• http://citeseerx.ist.psu.edu/viewdoc/download;jsessionid=84D11348847CDC13691DFAED09883FCB?doi=10.1.1.118.1909&rep=rep1&type=pdf;
• 2. Implementation is completely free from in-line assembly code;
• 3. The kernel (code) is both compatible across different C compilers and portable across different micro-controllers and
• 4. The algorithm designed guarantees hard-real-time-functionality with overheads at the scales of less than 3 processor cycles.
• M.S.Engg. Dissertation
• Title: Scalable Real-Time Kernel For Embedded Systems
• Advisor: Professor Dr. Christo Angelov, Head Software Engg. Group, Uni. Of Southern Denmark, Denmark.
• Other Projects:
• SLC Static, HARTEX, Embedded programming for Atmel micro-controllers.