Mohit Patle

Software Engineer

Bengaluru, Karnataka, India7 yrs 10 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

5 years of experience in advanced VLSI technologies
Expertise in Synopsys tools for physical design
Strong background in low-power and digital electronics

Stackforce AI infers this person is a VLSI Design Engineer with expertise in physical design and advanced semiconductor technologies.

Contact

moh.patle@gmail.com LinkedIn

Skills

Core Skills

Very-large-scale Integration (vlsi)Physical Design

Other Skills

Pin PlacementPowerPlansSTALow-power DesignAnalog electronicsDigital ElectronicsVerilogElectrostatic Discharge (ESD)Layout Versus Schematic (LVS)Design Rule Checking (DRC)EMIRPNRFloorplanningPhysical Verification

About

5 years of experience in latest submicron VLSI Technologies such as Intel 18A,TSMC 5nm, TSMC 7nm and TSMC 16nm. Tool expertise in Synopsys's FC, ICC2, ICV, StarRC, PrimeTime, Redhawk and Calibre.

Experience

7 yrs 10 mos

Total Experience

3 yrs 11 mos

Average Tenure

4 yrs 1 mo

Current Experience

Intel corporation

Senior Physical Design Engineer

Apr 2022 – Present · 4 yrs 1 mo · Bengaluru, Karnataka, India · Hybrid

Pin PlacementPowerPlansVery-Large-Scale Integration (VLSI)Physical Design

Synopsys inc

ASIC Physical Design Engineer II

Jul 2018 – Apr 2022 · 3 yrs 9 mos · Bangalore Urban, Karnataka, India · On-site

Pin PlacementSTAVery-Large-Scale Integration (VLSI)Physical Design

Education

National Institute of Technology, Tiruchirappalli

Master of Technology - MTech — VLSI Systems

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