Anil Sama

CEO

Bengaluru, Karnataka, India34 yrs 6 mos experience

Highly Stable

Key Highlights

Led development of flagship smartphone platform.
Oversaw world's first 6-core CPU development.
Managed successful engineering programs in networking.

Stackforce AI infers this person is a leader in Semiconductor and Mobile Communications industries.

Contact

Skills

Other Skills

ProcessorsEmbedded SoftwareMicroprocessorsEngineeringSoftware DevelopmentSiliconIntelHardwareMobile CommunicationsWirelessCross-functional Team LeadershipSemiconductorsWireless NetworkingASICSoC

About

Seasoned leadership of global R&D teams covering silicon development, platform hardware and software development. Domains spanning CPUs and platform designs for PCs, Servers, Smartphones, Tablets, Wireless and Optical networking. Command of entire value chain from product concept to design to high volume production and market launch.

Experience

34 yrs 6 mos

Total Experience

7 yrs 2 mos

Average Tenure

5 yrs 6 mos

Current Experience

Intel corporation

Vice President & General Manager, Altera India

Oct 2020 – Present · 5 yrs 6 mos · Bangalore Urban, Karnataka, India

Intel mobile communications

COO, Intel Mobile Communications India

Nov 2013 – Oct 2020 · 6 yrs 11 mos · Bangalore

Intel

Director of Engineering, Mobile Communications Group

Oct 2011 – Oct 2020 · 9 yrs · Bengaluru Area, India

Intel corporation

4 roles

Engineering Program Director, Ultra Mobility Group

Jan 2008 – Sep 2011 · 3 yrs 8 mos

Led development of Intel's flagship smartphone platform from definition to product readiness. Complete oversight of all aspects of development.

Engineering Program Director, Server CPU Division

Promoted

May 2003 – Dec 2007 · 4 yrs 7 mos

Part of core team setting up Intel's greenfield Server CPU development facility in India. Grew team and capability to successfuly deliver world's first 6-core CPU from the site. Full program oversight from definition to execution through production readiness.

Sr. Staff Engineer, CPU Silicon Design

Sep 1996 – Jun 2000 · 3 yrs 9 mos · San Francisco Bay Area

Key part of Pentium(R) III design team at Intel. Managed and directed an engineering team + hands on design of a portion of the chip. Also drove Synthesis, P&R convergence of the design.

Staff Engineer, CPU Silicon Design

Jul 1991 – Sep 1996 · 5 yrs 2 mos · San Francisco Bay Area

Key contributor and designer of logic on the Pentium(R) II microprocessor. Key contributor & designer of a unit on the Intel 486-DX4(R) processor. Rotations in Technical Marketing, Q&R, Flash Memory Design.