M

Manoj Tiwari

Product Engineer

Bengaluru, Karnataka, India21 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Principal Design Engineer with extensive ASIC expertise.
  • Strong background in Physical Design and EDA tools.
  • Proven track record in VLSI and SoC design.
Stackforce AI infers this person is a semiconductor design expert with a focus on ASIC and VLSI technologies.

Contact

LinkedIn

Skills

Core Skills

Physical DesignAsic

Other Skills

EDAStatic Timing AnalysisVerilogTCLSoCSystemVerilogDebuggingSemiconductorsRTL designPerlApplication-Specific Integrated Circuits (ASIC)Very-Large-Scale Integration (VLSI)System on a Chip (SoC)

Experience

21 yrs 9 mos
Total Experience
7 yrs 8 mos
Average Tenure
10 yrs
Current Experience

Advanced micro devices (amd)

2 roles

Principal Design Engineer

Promoted

Apr 2017 – Present · 9 yrs

Physical DesignEDAASICStatic Timing AnalysisVerilogTCL+9

Senior Technical Staff Engineer

May 2012 – Apr 2016 · 3 yrs 11 mos · bangalore

Qualcomm

Senior Staff Engineer

Apr 2016 – Present · 10 yrs · Bengaluru Area, India

Cadence design systems

Member of Consulting Staff

Jul 2004 – May 2012 · 7 yrs 10 mos

Stmicroelectronics

Design Engineer

Jan 2004 – Jan 2004 · 0 mo

Education

Stony Brook University

M.S — Electrical and computer engineering

Jan 2001 – Jan 2003

Kendriya Vidyalaya

Jan 1991 – Jan 1992

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