ADITYA ANAND

Software Engineer

Bengaluru, Karnataka, India9 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Static Timing Analysis and Logic Synthesis.
  • Proficient in Low-power Design and VLSI methodologies.
  • Strong background in hardware design cycle and verification.
Stackforce AI infers this person is a Hardware Design Engineer specializing in VLSI and low-power design.

Contact

LinkedIn

Skills

Core Skills

Static Timing AnalysisLogic Synthesis

Other Skills

Low-power DesignVery-Large-Scale Integration (VLSI)PerlTcl-TkFormal VerificationDFT CompilerDesign CompilerSynopsys PrimetimeTetramaxPhysical SynthesisTiming ClosureLECCLPHindi poems

About

A consistent life long learner working in hardware design cycle around Synthesis, STA, Floorplanning, Pre CTS clock routing.

Experience

9 yrs 3 mos
Total Experience
3 yrs 1 mo
Average Tenure
4 yrs 7 mos
Current Experience

Nvidia

Senior Hardware Engineer

Sep 2021 – Present · 4 yrs 7 mos · Bengaluru, Karnataka, India

Static Timing AnalysisLogic SynthesisLow-power DesignVery-Large-Scale Integration (VLSI)PerlTcl-Tk+9

Mediatek

Hardware Engineer

Jan 2018 – Aug 2021 · 3 yrs 7 mos · Bangalore

Bny mellon

Software Engineer

Aug 2014 – Sep 2015 · 1 yr 1 mo · Pune, Maharashtra, India

  • Quality Analyst

Education

Birla Institute of Technology and Science, Pilani

Master of Engineering (M.Eng.) — Microelectronics

Jan 2016 – Jan 2018

University of Pune

Bachelor of Engineering (BE) — Electronics and Telecommunication

Jan 2010 – Jan 2014

Stackforce found 100+ more professionals with Static Timing Analysis & Logic Synthesis

Explore similar profiles based on matching skills and experience

Hema Lakshmi Singana

Hema Lakshmi Singana

Synthesis Engineer

at MediaTek

Bengaluru, India5 yrs 4 mos exp
Physical DesignSynthesis
Vikas Verma

Vikas Verma

Senior Staff Engineer

at MediaTek

Bengaluru, India13 yrs 5 mos exp
VLSISoCPhysical DesignTiming Closure
Himanshu Gupta

Himanshu Gupta

Digital Design Engineer

at Intel Corporation

Lucknow, India1 yr 9 mos exp
Digital Circuit DesignVLSI
NK

Nikhil Khandelwal

Principal Engineer

at Arm

Noida, India15 yrs 6 mos exp
ASICPhysical Design
Atul Mukkawar

Atul Mukkawar

Lead Engineer

at Qualcomm

India9 yrs 7 mos exp
Very-Large-Scale Integration (VLSI)Application-Specific Integrated Circuits (ASIC)
Arjun Singh

Arjun Singh

PMTS

at AMD

Noida, India21 yrs 3 mos exp
EDASoftware Development
Prasad Babu P

Prasad Babu P

Senior Member of Technical Staff

at AMD

India19 yrs 6 mos exp
Functional VerificationVHDL
Dimple Lalwani

Dimple Lalwani

ASIC Design Engineer

at Meta

Bengaluru, India18 yrs 5 mos exp
SoCASIC