Dimple Lalwani

Software Engineer

Bengaluru, Karnataka, India18 yrs 5 mos experience
Highly Stable

Key Highlights

  • 24+ years of VLSI industry experience
  • Expertise in SOC development from specifications to tape out
  • Successful silicon bring-ups with cross-functional teams
Stackforce AI infers this person is a VLSI design expert with extensive experience in ASIC and SoC development.

Contact

Skills

Core Skills

SocAsic

Other Skills

RTL designTiming ClosureLow Power DesignStatic Timing AnalysisEDALogic SynthesisPhysical DesignVerilogARMTCLICFPGA

About

• 24+ years of experience in the VLSI industry • Excellent track record of developing first pass Subsystems and SOCs • In-depth knowledge of SOC development from specifications to Tape out • Extensive hands-on experience on Front End implementation, tools and flows • Expertise on constraint development for synthesis and sign off STA • Expertise in low power design and hands on experience in low power sign off checks • In-depth knowledge on ARM interconnects (CHI/AXI protocols) • Hands-on experience in integration of DDR4/LPDDR5 controllers • Expertise in system level debug and been part of multiple successful silicon bring-ups • Extensive experience on working with cross functional teams • Hands on experience with customer application performance analysis, identifying bottlenecks and resolving the same

Experience

18 yrs 5 mos
Total Experience
7 yrs 11 mos
Average Tenure
2 yrs 6 mos
Current Experience

Meta

ASIC Design Engineer

Oct 2023Present · 2 yrs 6 mos

SoCRTL designTiming ClosureLow Power DesignStatic Timing AnalysisEDA+8

Broadcom

Sr Principal Staff Engineer

Sep 2014Oct 2023 · 9 yrs 1 mo

Stmicroelectronics

2 roles

Sr Technical Manager

Promoted

Oct 2012Sep 2014 · 1 yr 11 mos

Technical Manager

Oct 2007Sep 2012 · 4 yrs 11 mos

Education

Birla Institute of Technology and Science, Pilani

M.E. Hons

Jan 1997Jan 1999

Nagpur University

B.E — Electronics and Power

Jan 1993Jan 1997

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