Vaishnavi Surve

Software Engineer

Bengaluru, Karnataka, India5 yrs 2 mos experience

Key Highlights

  • Experienced in MBIST and ASIC design.
  • Strong background in digital logic and test design.
  • Effective communicator with public speaking skills.
Stackforce AI infers this person is a Silicon Design Engineer with expertise in DFT and ASIC technologies.

Contact

Skills

Core Skills

MbistApplication-specific Integrated Circuits (asic)

Other Skills

VCSLogic DesignJoint Test Action Group (JTAG)Hardware Description LanguageDigital LogicTest DesignXceliumVerdiTessentBISTElectronics DesignEDAComputer SimulationsBoundary ScanMicrosoft Office

About

Vaishnavi knows a little about everything and not a lot about many things. She is always keen on bridging the gap. Design for Test is much like debugging life. To anticipate future failures while simulating present glitches.

Experience

5 yrs 2 mos
Total Experience
1 yr 4 mos
Average Tenure
10 mos
Current Experience

Amd

Silicon Design Engineer 2

Jun 2025Present · 10 mos

VCSMBISTLogic DesignJoint Test Action Group (JTAG)Hardware Description LanguageDigital Logic+10

Mediatek

DFT Engineer

Nov 2022May 2025 · 2 yrs 6 mos · Bengaluru, Karnataka, India

MBISTApplication-Specific Integrated Circuits (ASIC)

Indian institute of science (iisc)

Project Assistant

Mar 2022Jul 2022 · 4 mos · Bengaluru, Karnataka, India

Pulse student media body nitk

Content Writer

Jun 2020Jul 2021 · 1 yr 1 mo

National institute of technology karnataka

Placement Coordinator

Jan 2020Jul 2021 · 1 yr 6 mos

Education

National Institute of Technology Karnataka

MTech by Research — VLSI Design

Aug 2019Jun 2022

Rajarambapu Institute of Technology, Rajaramnagar, SAKHARALE

Bachelor of Technology — Electronics & Telecommunication

Jan 2016Jan 2019

Walchand College of Engineering(A Govt. Aided Autonomous Institute),SANGLI-M.S

Diploma — Industrial Electronics Technology

Jan 2013Jan 2016

Stackforce found 100+ more professionals with Mbist & Application-specific Integrated Circuits (asic)

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