Mar 2020 – Jun 2023 · 3 yrs 3 mos · Bengaluru, Karnataka · On-site

Jun 2017 – Mar 2020 · 2 yrs 9 mos

• Responsible for developing GPU model for performance evaluation of Adreno GPU.
• 1) Writing cycle accurate models written in C++
• 2) Correlating the model with RTL
• 3) Providing technical leadership for developing the model
• Skills
• 1) C/C++, perl programming
• 2) Verilog RTL coding
• 3) Computer architecture
• 4) GPU architecture
• 5) RTL Synthesis
• 6) Debug - C/C++, RTL waveforms, post Si issues

Nov 2013 – Jun 2017 · 3 yrs 7 mos

• Senior Lead Engineer in Graphics HW design team
• 1) Worked on developing cycle accurate GPU model for evaluation of new features
• 2) Evaluated caches for deciding upon performance vs area trade off
• 3) Used TLM for analysis of memory subsystem (MMU, DDR, System cache) to find optimal MMU cache sizes, number of outstanding requests in GPU, optimal AXI bus frequency
• 4) Worked on RTL development of hidden surface removal

May 2011 – Nov 2013 · 2 yrs 6 mos

• Worked on RTL development of cache and memory arbiter
• Worked on RTL integration for GPU's
• Worked on Synthesis of GPU RTL

May 2009 – May 2011 · 2 yrs

• I work in Graphics team. My responsibilities include delivering netlist and timing models for 2D Graphics hardware accelerator (GPU), maintaining the RTL of GPU and working on enhancements.

Sep 2007 – May 2009 · 1 yr 8 mos

• I worked on implementation of MBIST in MSM designed in Qualcomm. During this time I integrated in house MBIST solution and also used LogicVision (Now Tessent by Mentor Graphics).

Aug 2007 – Sep 2007 · 1 mo

• Joined as a fresher, but there was a lay off of all freshers in September 2007.