Abhay Kumar Mishra — Software Engineer

Experienced Verification Engineer with a demonstrated history of working in the semiconductors industry. Experience in VLSI Front End Design & SoC/IP level Verification. Good Understanding and Programming Skills in Verilog & System Verilog. Hands-on Experience with EDA tools ( Mentor graphics-Questa and Modelsim, VCS, Verdi). Specialties: Verilog , SystemVerilog, System Verilog Assertions, UVM/OVM(Methodology). - Good understanding of the ASIC Verification Flow & Testbench architecture. - Good knowledge of Fundamental of Digital Design Concepts. - Worked on Protocol- MIPI, AHB-LIte, AXI, RDMA - Worked on Ethernet packet verification. - Worked on coverage's: Code coverage, Functional coverage, Assertion coverage. - Worked on IP, Sub-system and SOC level verification. - Excellent knowledge of Verilog/SV/SVA. - Worked on the development of Testbench using OVM/UVM. - Worked on UVM-RAL Modelling. - Know basic Perl scripting. - Strong engineering professional with a PG Diploma in VLSI from C-DAC ACTS.

Stackforce AI infers this person is a Verification Engineer specializing in semiconductor design and verification methodologies.

Location: Noida, Uttar Pradesh, India

Experience: 13 yrs 1 mo