Vipasha Mittal

Software Engineer

Bengaluru, Karnataka, India8 yrs 10 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in low power circuit and system design.
Recipient of prestigious fellowships and awards.
Strong advocate for diversity in technology.

Stackforce AI infers this person is a specialist in Analog and Mixed-Signal IC Design for Automotive and Telecommunications industries.

Contact

vipashamittal@gmail.com LinkedIn

Skills

Core Skills

Analog Circuit DesignMixed-signal Ic DesignDigital Signal Processing

Other Skills

RTL DesignSystemVerilogRF CircuitsCadence VirtuosoKeysight ADSPythonAnsys HelicSystem ModellingStatistical AnalysisAnalog Design5G TechnologyTesting MethodologiesLow Jitter MeasurementQuaternion AlgebraPeakview

About

Passionate about low power circuit and system design. Experienced in digital and analog circuit design, system modelling and validation I completed my masters in EECS from Massachusetts Institute of technology in 2021 and my BTech in Electrical engineering from IIT Delhi in 2018, where I was awarded the Institute silver medal and Prof CS Jha Memorial Award. At MIT, I was a recipient of the Jacobs Presidential fellowship. I deeply care about making technology accessible for all. Outside of work, I love reading books, playing flute, travelling and writing. (I also have a small collection of poetry published, Aurora:Verses for the soul) I am a strong proponent for diversity, especially for historically underserved groups.

Experience

8 yrs 10 mos

Total Experience

2 yrs 11 mos

Average Tenure

3 yrs 6 mos

Current Experience

Texas instruments

ASIC Design Engineer

Nov 2022 – Present · 3 yrs 6 mos · Bengaluru, Karnataka, India · On-site

Currently working on algorithms and digital systems design for automotive SerDes applications. (April 2025 - Present)
Previously in RF Amplifiers team: (Nov 2022- Mar 2025)
Worked on high speed front-end wideband amplifiers for test and measurement applications.
Designed the end to end chain for a satellite communication receiver front end, from LNAs to fixed and variable gain amplifiers, current combiners and voltage drivers.
Designed and taped out a highly reconfigurable bias chip for a SiGe-GaAs multi-chip module. (including configurable temperature slopes across wide range of voltages and currents, high voltage V/I drivers).
Developed the architecture, designed and taped out a clockless temperature sensor, which is used in multiple products.
Enabled the flow of multi chip module simulations from scratch (Virtuoso - ADS), enabling the team to simulate several MCM LNA front ends and identifying issues during design.
Worked extensively on understanding of phase noise, developing schemes and circuits for achieving extremely low phase noise LNAs for SDR.

RTL DesignSystemVerilogDigital Signal ProcessingRF CircuitsMixed-Signal IC DesignAnalog Circuit Design+4

Mediatek

Research Intern - Analog Design

Jun 2021 – Aug 2021 · 2 mos · Woburn, Massachusetts, United States

Worked on high linearity analog front ends for sub-6 GHz 5G and mmWave 5G technology with Dr Ayman Shabra.

Analog Design5G TechnologyAnalog Circuit Design

Mit eecs

Research Assistant

Sep 2018 – Aug 2022 · 3 yrs 11 mos · Cambridge, Massachusetts, United States

Worked on low power analog and mixed signal circuit design with Prof Hae Seung Lee and Prof Anantha Chandrakasan.
Developed the architecture, designed and taped out a thermal noise based temperature sensors. Did extensive mathematical and system analysis to use statistical properties of transistor level thermal noise to measure temperature.
Worked on low power ultrasound imaging patches and on system modelling of ultrasound imaging.
Minored in Cognitive Neuroscience

Analog Circuit DesignSystem ModellingStatistical Analysis

Indian institute of technology, delhi

3 roles

Teaching Assistant

Aug 2017 – May 2018 · 9 mos

Teaching Assistant for the course Analog Electronics in Fall 2017, and Introduction to Electrical Engineering in Spring 2018.

Research Assistant

Dec 2016 – May 2018 · 1 yr 5 mos

Worked on iterative learning control with Prof Shouri Chatterjee. Designed and taped out an iterative learning controller for regulating LDO voltage during load transients. Developed the architecture of a configurable solar cell module for maximum power point tracking, using iterative learning control.