J

Jyothi M

Software Engineer

Bengaluru, Karnataka, India11 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Senior Design Engineer with expertise in DFT methodologies.
  • Proficient in ATPG and scan insertion techniques.
  • Strong background in simulation tools and scripting languages.
Stackforce AI infers this person is a Semiconductor Design Engineer with a focus on DFT and testing methodologies.

Contact

LinkedIn

Skills

Core Skills

DftAutomatic Test Pattern Generation (atpg)

Other Skills

Scan InsertionVCS SimulationTetramaxTessentperltclverilogGate Level Simulation

Experience

11 yrs 10 mos
Total Experience
3 yrs 11 mos
Average Tenure
7 yrs 9 mos
Current Experience

Amd

Senior Design Engineer

Aug 2018 – Present · 7 yrs 9 mos · Bengaluru, Karnataka, India

DFTAutomatic Test Pattern Generation (ATPG)Scan InsertionVCS SimulationTetramaxTessent+4

Mediatek

Design Engineer

Mar 2017 – Aug 2018 · 1 yr 5 mos · Bengaluru, Karnataka, India

Imspired solutions pvt ltd

Design Engineer

Jul 2014 – Mar 2017 · 2 yrs 8 mos · Bengaluru, Karnataka, India

Education

HKBK college of engineering

Bachelor of Engineering — Electronics and communication

Jan 2010 – Jan 2014

St. Anne pre-university college

pre-university — PCMC

Jan 2008 – Jan 2010

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