Sampat Balawat

Software Engineer

Bengaluru, Karnataka, India9 yrs 4 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 7+ years of experience in DFT domain.
  • Expertise in DFT RTL integration and timing analysis.
  • Proven track record in test time and pattern count reduction.
Stackforce AI infers this person is a DFT expert in the semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

DftStatic Timing Analysis

Other Skills

Scan InsertionJoint Test Action Group (JTAG)Automatic Test Pattern Generation (ATPG)RTL CodingPython (Programming Language)Tcl-TkDFT RTL

About

7+ Years of experience in DFT domain - SOC DFT RTL integration - Scan insertion - DFT STA timing constraints - ATPG coverage improvement - Test time reduction and pattern count reduction - Post Silicon Debug

Experience

9 yrs 4 mos
Total Experience
4 yrs 8 mos
Average Tenure
8 yrs 6 mos
Current Experience

Mediatek

3 roles

Staff DFT Engineer

Promoted

Jun 2021 – Present · 4 yrs 10 mos · Bengaluru, Karnataka, India

Static Timing AnalysisScan InsertionDFT

Senior DFT Engineer

Promoted

Jun 2018 – May 2021 · 2 yrs 11 mos · Bengaluru, Karnataka, India

DFT engineer

Aug 2017 – May 2018 · 9 mos · Bengaluru, Karnataka, India

Infineon technologies

Intern

Jul 2016 – May 2017 · 10 mos · Bangalore

Education

Manipal Institute of Technology

Master of Technology (M.Tech.) — Digital electronics and Communication

Jan 2015 – Jan 2017

Basaveshwar Engineering College, BAGALKOT

Bachelor of Engineering (BE) — Electronics and Communication

Jan 2010 – Jan 2014

BASAVESHWARA SCIENCE COLLEGE BAGALKOT

PUC — Science

Jan 2008 – Jan 2010

Basaveshwar new high school

SSLC

Jan 2007 – Jan 2008

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