Nithin Jayavarapu

Software Engineer

Hyderabad, Telangana, India14 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Physical Design and ASIC methodologies.
  • Proven track record in full chip floorplanning.
  • Strong experience with Synopsys tools and VLSI design.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and VLSI.

Contact

LinkedIn

Skills

Core Skills

Physical DesignAsic

Other Skills

Full chip floorplanPin placementSSB PlanningRepeatersStatic Timing AnalysisSynopsys toolsPlace & RouteSynopsys PrimetimeClock Tree SynthesisSynthesisTCLPhysical VerificationFloorplanningUnixLVS

Experience

14 yrs 10 mos
Total Experience
2 yrs 11 mos
Average Tenure
4 yrs
Current Experience

Amd

SMTS Silicon Design Engineer

May 2022 – Present · 4 yrs · Hyderabad, Telangana, India

Full chip floorplanPin placementPhysical DesignASIC

Synopsys inc

ASIC Physical Design Engineer sr II

Nov 2020 – May 2022 · 1 yr 6 mos · Hyderabad, Telangana, India

Full chip floorplanPhysical DesignASIC

Eximius design

2 roles

Staff Engineer

Promoted

Apr 2019 – Nov 2020 · 1 yr 7 mos · Hyderabad Area, India

Full chip floorplanPin placementPhysical DesignASIC

Senior Physical Design Engineer

Jan 2018 – Mar 2019 · 1 yr 2 mos · Hyderabad Area, India

Ust global

2 roles

Senior Product Development Engineer

Apr 2016 – Dec 2017 · 1 yr 8 mos

Senior Product Development Engineer

Aug 2014 – Apr 2016 · 1 yr 8 mos

Tata consultancy services

2 roles

Systems Engineer

Promoted

Apr 2013 – Jul 2014 · 1 yr 3 mos

Assistant Systems Engineer

Mar 2011 – Mar 2013 · 2 yrs

Education

National Institute of Technology Calicut

Master's Degree — Electronic Design and Technology

Jan 2008 – Jan 2010

Sai Spurthi Institute of Technology

Bachelor of Technology (B.Tech.) — Electronics and Communications Engineering

Jan 2004 – Jan 2008

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