santhi swaroop — Software Engineer

- 6yrs of experience in CPU timing closure, STA Sign-off, Constraints, Synthesis, Logic Equivalence. - Good experience in working with cross-functional team cultures spanning across multiple geo locations. - Very good understanding of SoC clock Architecture, Clocking and Timing Sign Off flows. - Responsible for complete timing signoff for different HM's frequency ranging above 1.5Ghz. - responsible for power optimization with low power techniques. - Hands on experience across multiple EDA vendors tools. -Timing Constraints Definition, Coding and Verification Static Timing Analysis (STA) -TCL Scripting -Timing eco fixes and closure

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Timing Analysis and Optimization.

Location: Bengaluru, Karnataka, India

Experience: 8 yrs