Bhupati Shukla

Software Engineer

Bengaluru, Karnataka, India22 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Experienced in SoC and ASIC design.
Strong leadership in engineering management roles.
Proficient in RTL design and functional verification.

Stackforce AI infers this person is a semiconductor design engineer with expertise in SoC and ASIC development.

Contact

Skills

Core Skills

Interconnect

Other Skills

RTL designLeadershipComputer ArchitectureVLSIDebuggingSoCASICFunctional VerificationSystemVerilogMicroprocessorsProcessorsVerilogSemiconductorsARMC++

Experience

22 yrs 3 mos

Total Experience

2 yrs 9 mos

Average Tenure

3 yrs

Current Experience

Ampere

Engineer

Apr 2023 – Present · 3 yrs

Interconnect

Intel corporation

SoC Debug Engineer

May 2021 – Mar 2023 · 1 yr 10 mos · Bengaluru, Karnataka, India

Interconnect

Qualcomm

Senior Staff Design Engineer

Nov 2018 – May 2021 · 2 yrs 6 mos · Bengaluru Area, India

Ampere

Manager Engineering III

Apr 2018 – Nov 2018 · 7 mos · Bengaluru Area, India

Appliedmicro

Manager - Engineering

Aug 2011 – Mar 2018 · 6 yrs 7 mos · Bengaluru Area, India

Advanced micro devices (amd)

Member of Technical Staff (MTS) Design Engineer

Feb 2007 – Aug 2011 · 4 yrs 6 mos

Montalvo systems

Design Engineer

Nov 2005 – Feb 2007 · 1 yr 3 mos

Tata consultancy services

Assistant Systems Engineer

Nov 2003 – Nov 2005 · 2 yrs

Education

BITS Pilani Work Integrated Learning Programmes

Master of Technology - MTech — Data Science & Engineering

Jan 2019 – Jan 2021

Visvesvaraya Technological University

Bachelor of Engineering - BE — Electronics and Communications Engineering

Jan 1999 – Jan 2003

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