Rajeev Ranjan — CTO
My expertise lies in Semiconductor Verification Technology and Electronic Design Automation Leadership. I have a long track record of successfully leveraging the latest formal technologies and applying algorithmic and verification technology expertise to customers in numerous industry segments. I have a background in assembling and directing top global teams, building strong relationships with customers in multiple countries, and providing the blueprint for YOY success. • One of the top industry experts with knowledge of formal techniques and usages across variety of verification applications. • Experience in dealing with designs from various industry segments (processors, GPUs, etc.) and knowledge of applying variety of advanced formal techniques to overcome computational complexity. • Experience in guiding customers meet tight project deadlines for formal deliverables by providing appropriate trade-off options while maximizing returns against compute/resource investment. • As CTO and VP of Application engineering at Jasper Design Automation, was early pioneer in leading the R&D and application engineering driven effort to introduce and create wide proliferation of formal technology across numerous companies in the semi-conductor industry. • Two decades of experience in leading the multi-continent teams of engineers at Jasper, Cadence, and Synopsys in enabling customers realize significant RoI from formal tools in their projects. 𝗦𝗣𝗘𝗖𝗜𝗔𝗟𝗧𝗜𝗘𝗦: Global Team Building & Leadership; Talent Recruitment & Acquisition; Strategic Customer Partnerships; Technology-Business Alignment; Employee Training & Mentoring; Product Design & Engineering; Product Development Lifecycle; Merger & Acquisition Integration
Stackforce AI infers this person is a Semiconductor and EDA expert with extensive leadership experience.
Location: San Jose, California, United States
Experience: 26 yrs 11 mos
Skills
- Fundraising
- Team Leadership
- Formal Verification
- Customer Engagement
- Product Development
- Business Development
- Engineering Management
Career Highlights
- Pioneered formal technology in semiconductor industry.
- Led multi-continent engineering teams for two decades.
- Achieved significant ROI for clients using formal tools.
Work Experience
Qualcomm
Custom CPU Principal Hardware Engineer (2 yrs 1 mo)
RR Technologies LLC
Founder (1 yr)
Indian Institute of Technology Kanpur Foundation
President (5 yrs 9 mos)
Synopsys Inc
Group Director (3 yrs 6 mos)
Cadence Design Systems
Senior Group Director (5 yrs 3 mos)
Jasper Design Automation
Chief Technology Officer and VP of Applications Engineering (11 yrs 2 mos)
Real Intent
CTO & VP of Engineering (4 yrs 4 mos)
Education
Master of Business Administration (M.B.A.) at The Wharton School
Ph.D. at University of California, Berkeley
M.S. at University of Illinois Urbana-Champaign
B. Tech. at Indian Institute of Technology, Kanpur