Rahul goud

Software Engineer

Hyderabad, Telangana, India9 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 7 years of experience in SoC Verification.
  • Proven track record in developing and reviewing test plans.
  • Expertise in Universal Verification Methodology (UVM).
Stackforce AI infers this person is a VLSI Verification Engineer with strong expertise in SoC design and verification.

Contact

LinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)

Other Skills

VerilogShell Scriptingsystem verilogVery-Large-Scale Integration (VLSI)VLSI Synopsys toolsCMOSRtl CodingRtl Design

About

With over 7 years of experience in SoC Verification, I have a proven track record of success in developing and reviewing detailed test plans

Experience

9 yrs 10 mos
Total Experience
2 yrs 5 mos
Average Tenure
4 yrs 1 mo
Current Experience

Soctronics

2 roles

Member of Technical Staff

Apr 2025 – Present · 1 yr · Hyderabad, Telangana, India

Senior Design Engineer

Mar 2022 – Jul 2025 · 3 yrs 4 mos · Hyderabad, Telangana, India

  • Working at AMD client location
Universal Verification Methodology (UVM)

Whizchip design technologies pvt ltd

Verification Engineer

Jan 2018 – Feb 2022 · 4 yrs 1 mo · Hyderabad, Telangana, India

  • Emulation

Seer akademi

Design Engineer

Nov 2016 – Jan 2018 · 1 yr 2 mos · Hyderabad Area, India

  • Working as a contractor in Synopsys India PVT LTD

Amd

Paid Volunteer/ Intern

May 2016 – Nov 2016 · 6 mos · Hyderabad Area, India

  • Verified X86 core (Zen & Valhalla arch) as part of my cores team
  • Carried various debugs on SVM, MCA and pagging

Education

JNTU-K

Master of Technology (MTech) — VLSI

Jan 2014 – Jan 2016

CDAC- ACTS Mumbai

PG-Diploma — VLSI

Jan 2013 – Jan 2014

Stackforce found 100+ more professionals with Universal Verification Methodology (uvm)

Explore similar profiles based on matching skills and experience

Shrdha S.

Shrdha S.

Sr Silicon Design Engineer

at AMD

Bengaluru, India6 yrs 2 mos exp
Low-power Design
MS

Mohit Sharma

Scientist/Engineer - SD

at Space Applications Centre, ISRO

Ahmedabad, India7 yrs 9 mos exp
Maheswari Durga Akula

Maheswari Durga Akula

Senior Design Verification Engineer

at AMD

Iragavaram, India3 yrs 10 mos exp
Jalpu Modi

Jalpu Modi

IP Verification Engineer

at Intel Corporation

Ahmedabad, India6 yrs 8 mos exp
Validation EngineeringSystemVerilog
VC

VARSHA C R

DFT Design Engineer

at Intel Corporation

Chennai, India1 yr 9 mos exp
VerilogSystemVerilog
Chandan Satapathy

Chandan Satapathy

Senior Silicon Design Engineer

at AMD

Bengaluru, India7 yrs 10 mos exp
System on a Chip (SoC)Functional Verification
AK

Abhishek Konale

Design Verification Engineer

at Qualcomm

Mumbai, India6 yrs 5 mos exp
Prapti Bhajiyawala

Prapti Bhajiyawala

CPU Verification Engineer - II

at NVIDIA

Bengaluru, India3 yrs 6 mos exp