Shrdha S.

Software Engineer

Bengaluru, Karnataka, India6 yrs 2 mos experience
Highly Stable

Key Highlights

  • Expert in Low-power Design methodologies.
  • Proficient in Universal Verification Methodology (UVM).
  • Extensive experience in silicon design engineering.
Stackforce AI infers this person is a Silicon Design Engineer with expertise in low-power design and verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Low-power Design

Other Skills

Universal Verification Methodology (UVM)

Experience

6 yrs 2 mos
Total Experience
3 yrs
Average Tenure
3 mos
Current Experience

Amd

Sr Silicon Design Engineer

Jan 2026 – Present · 3 mos · On-site

Low-power DesignUniversal Verification Methodology (UVM)

Synopsys inc

ASIC Digital Design Engineer

Apr 2023 – Jan 2026 · 2 yrs 9 mos · India

Qualcomm

Senior Design Verification Engineer

Feb 2020 – Mar 2023 · 3 yrs 1 mo

Insemi technology services pvt. ltd.

Senior Design Verification Engineer

Jan 2020 – Mar 2023 · 3 yrs 2 mos

Education

Maulana Azad National Institute of Technology

Master of Technology - MTech — VLSI & Embedded Systems

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