Aditya Chauhan

Software Engineer

Bengaluru, Karnataka, India7 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expert in RTL Design and Timing Analysis.
  • Proficient in simulation and CDC methodologies.
  • Strong background in VLSI design and implementation.
Stackforce AI infers this person is a VLSI design expert with a focus on timing analysis and RTL design.

Contact

Skills

Core Skills

Rtl DesignTiming Analysis

Other Skills

SimulationCDCECOPNRDRCLintTime ConstraintsEPSEmbedded C RoboticsVHDLVDAArea & powerCTSTimingeCos

Experience

7 yrs 10 mos
Total Experience
6 yrs 10 mos
Average Tenure
1 yr 1 mo
Current Experience

Renesas electronics

2 roles

STA Engineer

Dec 2025Present · 5 mos

VLSI Implementation Engineer

Apr 2025Dec 2025 · 8 mos

Mediatek

3 roles

RTL Design & Integration Engineer

Apr 2023May 2025 · 2 yrs 1 mo · On-site

SimulationCDCRTL Design

Timing Analysis Engineer

Jun 2021Apr 2023 · 1 yr 10 mos · On-site

ECOTiming Analysis

Physical Design Engineer

Jul 2018Jun 2021 · 2 yrs 11 mos · On-site

PNRDRC

Education

National Institute of Technology Karnataka

Master of Technology — VLSI Design

Jan 2016Jan 2018

JN Govt. Engg. College, HP

B.Tech — Electronics and Communications Engineering

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