Marcus Bosco

Software Engineer

Bengaluru, Karnataka, India8 yrs 8 mos experience

Key Highlights

  • Expertise in design verification for complex systems.
  • Proficient in UVM and SystemVerilog methodologies.
  • Strong background in ASIC and FPGA technologies.
Stackforce AI infers this person is a Design Verification Engineer specializing in ASIC and FPGA technologies.

Contact

Skills

Other Skills

RTL DesignRTL VerificationStatic Timing AnalysisSVACode Coverage

About

Experienced Design Verification Engineer with a demonstrated history of working in the information technology and services industry. Skilled in CMOS, Field-Programmable Gate Arrays (FPGA), Universal Verification Methodology (UVM), SystemVerilog, and Application-Specific Integrated Circuits (ASIC). Strong arts and design professional with a Bachelor's degree focused in electronics and communications from KNS Institute Of Technology.

Experience

8 yrs 8 mos
Total Experience
1 yr 9 mos
Average Tenure
1 yr 5 mos
Current Experience

Texas instruments

Senior Design Verification Engineer

Dec 2024Present · 1 yr 5 mos

Amd

Senior Silicon Design Engineer

Apr 2022Dec 2024 · 2 yrs 8 mos · Bengaluru, Karnataka, India

Spicaworks

Senior Design Verification Engineer

Jun 2021Apr 2022 · 10 mos · Bengaluru, Karnataka, India

Altran

Design and verification Engineer

Mar 2018Jun 2021 · 3 yrs 3 mos · Bangalore

Maven silicon

VLSI

Aug 2017Feb 2018 · 6 mos

Education

KNS Institute Of Technology

Bachelor's degree — electronics and communications

Jan 2013Jan 2017

Parachute Regiment school

Jan 1999Jan 2011

Maven Silicon VLSI training institute

VLSI design and verification

St. Joseph's Indian Composite PUC

PCMB

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