Latha Nagabhushan — Software Engineer

SoC Verification professional with 14+ years of experience in end-to-end functional verification of complex ASIC/SoC designs. Strong expertise in SystemVerilog and UVM, covering block-level, subsystem, and full-chip verification. Proven track record in building reusable UVM environments, developing comprehensive verification plans, driving coverage closure, and leading complex debug efforts. Extensive hands-on experience with industry-standard protocols such as AMBA AXI/AHB/APB, PCIe, DDR, and high-speed interfaces. Currently operating in a technical leadership role, mentoring engineers, reviewing verification architectures, and collaborating closely with design, architecture, and validation teams to ensure first-silicon success. Passionate about quality, scalability, and delivering robust verification solutions for advanced SoCs.

Stackforce AI infers this person is a SoC Verification Engineer with deep expertise in ASIC design and verification.

Location: Bengaluru, Karnataka, India

Experience: 14 yrs 4 mos