Sreekanth Babu Nukaraju — Software Engineer
• Having sound experience as physical design engineer involved in 30+ successful tapeouts • Good experience in complete physical design flow from netlist to GdsII implementation. • Worked on cutting edge technologies like 5nm, 7nm, 16nm, 28nm, 40/45nm, 55/65nm and 90nm technologies. • Lead/mentor a small team. • Good hands on SOC full chip and block level physical design implementation • Good hands on experience in using Cadence Encounter/Innovus and Synopsys ICCompiler II tools for place and route • Exposure in low power implementation • Good hands on synthesis and constraint development and timing analysis (STA) • Good hands on physical verification flow i.e. DRC/LVS/ANT/ERC and other signoff checks. Specialties: Netlist to signoff
Stackforce AI infers this person is a highly skilled Physical Design Engineer in the Semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 18 yrs 9 mos
Skills
- Physical Design
- Soc
- Asic
- Digital Implementation
Career Highlights
- Over 30 successful tapeouts in physical design.
- Expertise in advanced technology nodes from 5nm to 90nm.
- Strong leadership experience mentoring a small team.
Work Experience
Broadcom Inc.
Principal Engineer (7 yrs 2 mos)
Synopsys Inc
Application Consultant (2 yrs 10 mos)
Freescale Semiconductor
Lead Engineer (3 yrs 4 mos)
MediaTek
Design Engineer (2 yrs 6 mos)
Wipro Technologies
Physical Design Engineer (2 yrs 11 mos)
Education
EGMP at Indian Institute of Management Bangalore
M Tech at National Institute of Technology, Tiruchirappalli
BTech at Sri Venkateswara University
6-12 at Jawahar Navodaya Vidayalaya Kurnool