Ankur Shukla — Product Engineer
Several years of experience as a Physical Design Engineer. Experience of working on full flow from netlist to GDS. Currently working as a STA Engineer at Qualcomm. Lead full STA closure, on high performance DSP cores, in several projects.
Stackforce AI infers this person is a Semiconductor expert with a focus on Physical Design and Static Timing Analysis.
Location: Bengaluru, Karnataka, India
Experience: 12 yrs 4 mos
Skills
- Static Timing Analysis
Career Highlights
- Experienced in full flow from netlist to GDS.
- Led STA closure for high performance DSP cores.
- Strong background in VLSI and Physical Design.
Work Experience
Synaptics Incorporated
Staff IC Physical Design Engineer (2 yrs 9 mos)
Qualcomm
Senior Lead Engineer (2 yrs 9 mos)
Senior Engineer (1 yr 8 mos)
Mirafra Technologies
Member Of Technical Staff (10 mos)
Cadence Design Systems
Senior Application Engineer (9 mos)
eInfochips
Physical Design Engineer (3 yrs 7 mos)
Education
Master of Technology - MTech at Birla Institute of Technology and Science, Pilani
Bachelor of Technology (B.Tech.) at National Institute of Technology Surat
VLSI - Physical Design at eITRA
VHDL at CETPA
High School at Spring Dale College
