Maria Jenifer J

Software Engineer

Bengaluru, Karnataka, India9 yrs 1 mo experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in VLSI and Functional Verification.
  • Proven track record in design tools development.
  • Strong background in power-efficient design methodologies.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and verification methodologies.

Contact

Skills

Core Skills

VlsiFunctional Verification

Other Skills

SynthesisFormal verificationLint checkingRTL power estimationClock domain crossing checksSystemVerilogVerilogVHDLUniversal Verification Methodology (UVM)Very-Large-Scale Integration (VLSI)Application-Specific Integrated Circuits (ASIC)Power Ana

About

Design Engineer

Experience

9 yrs 1 mo
Total Experience
4 yrs 6 mos
Average Tenure
7 yrs 8 mos
Current Experience

Qualcomm

3 roles

Staff Engineer

Promoted

Dec 2023Present · 2 yrs 5 mos

Senior Lead Engineer

Nov 2020Nov 2023 · 3 yrs

Senior Design Engineer

Aug 2018Nov 2020 · 2 yrs 3 mos

Intel corporation

Design Engineer (Consultant)

Mar 2017Aug 2018 · 1 yr 5 mos · Bengaluru, Karnataka, India

  • Responsible for Design tools.
  • Synthesis, Formal verification, Lint checking for low power, RTL power estimation, clock domain crossing checks.
SynthesisFormal verificationLint checkingRTL power estimationClock domain crossing checksVLSI+1

Education

Amrita School Of engineering

Master of Technology (MTech) — VLSI Design

Pondicherry University

Btech — Electrical and Electronics Engg

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