Manasa Nambiar

Software Engineer

Pune, Maharashtra, India2 yrs 11 mos experience

Key Highlights

  • Expert in Physical Design and Verification for advanced technology nodes.
  • Proficient in resolving complex DRC and LVS issues.
  • Strong background in reliability issue resolution in semiconductor design.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Verification.

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Skills

Core Skills

Physical DesignPhysical Verification

Other Skills

Layout Versus Schematic (LVS)Design Rule Checking (DRC)Place & RouteCMOS conceptsASIC flowIC Fabrication processLinux/Unix

About

Experience in Physical desin and verification of blocks in latest technologies independently with good knowledge on concepts of PD,LVS and DRC. Worked on technology nodes likes 10 nm and 14nm Physical Design and Verification flow. Worked on Floor planning, Placement, CTS and Routing (PnR) and physical verification. Experience in fixing reliability issues like antenna, crosstalk, EM ,IR, Signal S Factor ,Self Heat and Power S F ,Fish Violation. Experience in fixing various DRCs and LVS for complex logic blocks. Experience in resolving base layer Drc, density issues. Implementing various types of ECOs,RCOs. Good knowledge in CMOS concepts. Good knowledge of ASIC flow and IC Fabrication process. Good knowledge of Linux/Unix .

Experience

2 yrs 11 mos
Total Experience
1 yr 5 mos
Average Tenure
--
Current Experience

Altran technology

Physical Design Engineer

Aug 2018Aug 2019 · 1 yr

Intel corporation

Physical Design Engineer

Aug 2016Jul 2018 · 1 yr 11 mos · Bengaluru Area, India

Physical DesignPhysical VerificationLayout Versus Schematic (LVS)Design Rule Checking (DRC)Place & Route

Education

Savitribai Phule Pune University

Master’s Degree — Electronic Science

Jan 2014Jan 2016

St.Aloysius College,Mangalore

Bachelor’s Degree

Jan 2011Jan 2014

Savitribai Phule Pune University

Postgraduate Degree — Electronic Science

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