Gopi Krishna — Software Engineer

Student at NITW, specialized in VLSI •Have 3.5 years of experience in ASIC physical design and 10 months internship in AMD. •Hands on experience in all aspects of IC design including Floor planning, Power planning, Place and Route, Clock Tree Synthesis, SI analysis, Signoff Timing analysis and closure, LEC, Physical Verification and IR drop analysis. •Comprehensive knowledge of Physical design implementation and Static timing analysis at tile level. •Worked on 2 timing and congestion critical blocks with interface of UMC EDDR_phy, at lower technology node (TSMC 6nm) in PnR and ECO stages. •Flow integration and automation.

Stackforce AI infers this person is a Semiconductor Design Engineer with extensive experience in ASIC physical design.

Location: Hyderabad, Telangana, India

Experience: 6 yrs 11 mos