Nitin Kumar

Software Engineer

Noida, Uttar Pradesh, India8 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in DFT methodologies and tools.
  • Strong background in VLSI design and testability.
  • Proficient in multiple EDA tools and scripting languages.
Stackforce AI infers this person is a DFT Design Engineer with expertise in VLSI and semiconductor testing.

Contact

Skills

Core Skills

Dft DesignTestability

Other Skills

Boundary ScanTime ConstraintsScan InsertionDfx(Design for testability/debug)Perl AutomationAnalog IC DesignMixed Signal IC designTCLVerilogCadence Virtuoso Layout EditorSGDFTMentor Graphics TessentEDTAutomatic Test Pattern Generation (ATPG)ATPG

About

Currently Working In DFT Team - SCAN,ATPG, LBIST, Simulations, silicon experience, SGDFT, DC #VLSI EDA Tools: Synopsys -DFT compiler, Synopsys-Tetramax, DFT compiler, Modelsim , SpyglassDFT, Synopsys – VCS , Mentor Graphics Tessent, Cadence Virtuoso, ALTERA Quartus-II #HDL : Verilog , System Verilog # Scripting Languages : PERL & TCL # FPGA Synthesis Tools : Altera-Quartus-II # Platforms : UNIX, Windows.

Experience

8 yrs 8 mos
Total Experience
2 yrs 5 mos
Average Tenure
1 yr 3 mos
Current Experience

Renesas electronics

Staff Engineer

Feb 2025Present · 1 yr 3 mos · Noida, Uttar Pradesh, India · On-site

Stmicroelectronics

3 roles

Staff Engineer

May 2024Feb 2025 · 9 mos

Technical Lead

Promoted

Apr 2022May 2024 · 2 yrs 1 mo

Boundary ScanTime ConstraintsDFT DesignTestability

Sr. Design Engineer

Jul 2021Apr 2022 · 9 mos

Qualcomm

2 roles

Senior DFT Engineer

Promoted

Nov 2020Jul 2021 · 8 mos

DFT Engineer

Jun 2018Nov 2020 · 2 yrs 5 mos

Intel corporation

Intern -DFT

Jul 2017Apr 2018 · 9 mos · Bengaluru, Karnataka, India

Education

Vellore Institute of Technology

Master of Technology - MTech — VLSI DESIGN

Jan 2016Jan 2018

University of Mumbai

Bachelor of Engineering - BE — Electronics and communication Engineering

Jan 2011Jan 2015

Army Public School

HSC — Science

Jan 2010Jan 2011

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