S

Shwetha Chander

Product Engineer

Bengaluru, Karnataka, India20 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in EDA and VLSI design methodologies.
  • Proven track record in physical design and timing closure.
  • Strong background in ASIC design and implementation.
Stackforce AI infers this person is a VLSI design expert with a focus on EDA tools and methodologies.

Contact

Skills

Core Skills

EdaVlsi

Other Skills

Physical DesignIC Compiler IIIC CompilerStatic Timing anaDFTSignal IntegrityTiming ClosureICC ZroutePlace and RouteLow PowerMulti VoltagePrimetimeICC-ICVDesign PlanningSTA

Experience

20 yrs
Total Experience
5 yrs
Average Tenure
9 yrs 1 mo
Current Experience

Cadence design systems

3 roles

AE Architect - GCS

Promoted

Jun 2024Present · 1 yr 11 mos

EDAVLSIPhysical DesignIC Compiler IIIC CompilerStatic Timing ana+12

Sr. Principal Support AE

Oct 2020Jun 2024 · 3 yrs 8 mos

Principal Support AE

Apr 2017Oct 2020 · 3 yrs 6 mos

Mediatek

SMTS ( consultant)

Jul 2016Mar 2017 · 8 mos · Bengaluru Area, India

  • Block level implementation

Synopsys

Sr. CAE

Apr 2012Apr 2016 · 4 yrs · Bangalore

Magma design automation

3 roles

Sr Product Engineer

Promoted

Jun 2009Mar 2012 · 2 yrs 9 mos

Product Engineer

Promoted

Jun 2007May 2009 · 1 yr 11 mos

Associate Product Engineer

Oct 2005May 2007 · 1 yr 7 mos

  • Static Timing Analysis -Product Engineering team

Education

National Institue of Engineering, Mysore.

BE — Electronics and communications.

Jan 2001Jan 2005

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