LAKSHYA PANDEY

Software Engineer

Varanasi, Uttar Pradesh, India2 yrs 3 mos experience

Most Likely To Switch

Key Highlights

Experienced in System on a Chip (SoC) design and verification.
Strong background in RTL verification and digital electronics.
Proven leadership skills in engineering teams.

Stackforce AI infers this person is a VLSI and ASIC design expert with strong verification skills.

Contact

Skills

Core Skills

System On A Chip (soc)Rtl VerificationBootingRegister Verification

Other Skills

DmaSystem verilogAMBA AHBVery-Large-Scale Integration (VLSI)LeadershipBasic knowledge of c and c++Good knowledge of verilogStrong in Digital electronicsDigital ElectronicsIntegrationRTL CodingAMBACadence Virtuoso Layout EditorVerilogCadence

Experience

2 yrs 3 mos

Total Experience

1 yr 1 mo

Average Tenure

2 yrs

Current Experience

Qualcomm

Senior Engineer

May 2024 – Present · 2 yrs · Noida, Uttar Pradesh, India · On-site

DmaRegister VerificationBootingSystem on a Chip (SoC)System verilogAMBA AHB+19

Amd

Sr.Design verification engineer

Jul 2023 – May 2024 · 10 mos · Hyderabad, Telangana, India · On-site

Booting

Nxp semiconductors

Design Verification Engineer

Jul 2021 – Jul 2023 · 2 yrs · Noida, Uttar Pradesh, India · On-site

System on a Chip (SoC)Register VerificationSynopsys PrimetimeDmaCadence EncounterAMBA

Ministrey of electronics and information technology

Intern

Dec 2019 – Jul 2021 · 1 yr 7 mos · Cgo conplex lodhi road jangpura · On-site

System on a Chip (SoC)

Indian institute of technology (banaras hindu university), varanasi

Trainee

May 2018 – Aug 2018 · 3 mos · Varanasi, Uttar Pradesh, India

Pine training academy of vlsi & embedded

Trainee

May 2017 – Aug 2017 · 3 mos · Ghaziabad, Uttar Pradesh, India · On-site

Education

Maharshi Dayanand University

B.tech

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