DHANUSH M K — Software Engineer
Having 7+ years of working experience with expertise in SystemVerilog, UVM, Verilog, Digital electronics & RTL debugging. - Worked on designing SystemVerilog RNM (Real Number Modelling [ Mimicking the Analog blocks behavior using SV]) Models (Digital Mixed Signal). - Good Knowledge on Bus Protocols like AMBA AHB, APB, AXI. - Good Knowledge on Peripheral Protocols like SPI, I2C. - PCIE Protocol - SOC Verification - Worked on Constraint Random Verification. - Knowledge in developing SV, UVM based verification environment. - Worked on Functional Coverage, SVA, Code Coverage Analysis & RAL Modelling. - Knowledge in testcase writing & debugging. - Perl, Python language knowledge for scripting. - C Programming
Stackforce AI infers this person is a Digital Verification Engineer with expertise in semiconductor and VLSI industries.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 11 mos
Skills
- Soc Verification
- Ip Verification
- Sv-rnm
Career Highlights
- 7+ years of expertise in SystemVerilog and UVM.
- Proficient in SOC and IP verification methodologies.
- Strong background in digital electronics and RTL debugging.
Work Experience
AMD
Senior Silicon Design Engineer (2 yrs 2 mos)
Meta
Design Verification Engineer (11 mos)
Synapse Design Inc.
Lead Engineer (1 yr 8 mos)
Senior Design Verification Engineer (1 yr 2 mos)
Project Engineer (2 yrs 11 mos)
Analog Devices
Digital Mixed Signal Engineer from Synapse Design (2 yrs)
Maven Silicon
VLSI Design & Verification Trainee (6 mos)
Education
Bachelor of Engineering (B.E.) at ATME College of Engineering, Mysuru
at Marimallappa PU College, Mysuru
