Sandhya Garg

Product Manager

Bengaluru, Karnataka, India13 yrs 11 mos experience

Key Highlights

  • Experienced in leading silicon design engineering teams.
  • Proficient in multiple verification methodologies and languages.
  • Strong background in VLSI and ASIC design.
Stackforce AI infers this person is a VLSI and ASIC design expert with extensive experience in silicon engineering.

Contact

Skills

Other Skills

Code CoverageSQLC++Functional VerificationOpen Verification MethodologyVerilogRTL codingRTL verificationModelSimQuestaXilinx ISEUVMAMBA AHBUARTAssertion Based Verification

About

An Enthusiasts looking for a challenging career in ASIC/EDA/VLSI industry where my “can-do” attitude, current experience and skill sets can be used and grow professionally while helping Organization benefit from my learning.

Experience

13 yrs 11 mos
Total Experience
3 yrs 1 mo
Average Tenure
1 yr 5 mos
Current Experience

Amd

Manager Silicon Design Engineering

Dec 2024Present · 1 yr 5 mos

Google

SMTS (as xwf)

Oct 2023Dec 2024 · 1 yr 2 mos

Intel corporation

Senior Validation Engineer

Mar 2021Oct 2023 · 2 yrs 7 mos

Qualcomm

Senior Design Verification Engineer

Mar 2016Mar 2021 · 5 yrs · India

Orange research labs

Design Verification Engineer

Jun 2012Mar 2016 · 3 yrs 9 mos · India

Mentor graphics

HEP trainee

May 2011Jul 2011 · 2 mos

Education

MDU ,rohtak

Bachelor of Technology (B.Tech.) — Electronics and Communications Engineering

Jan 2007Jan 2011

Apeejay School,Faridabad

Jan 2004Jan 2006

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