JYOTHI SWAROOP REDDY N

Product Engineer

Bengaluru, Karnataka, India3 yrs 6 mos experience
Highly Stable

Key Highlights

  • 3 years of experience in VLSI domain.
  • Specialized in IP and subsystem verification.
  • Proficient in SystemVerilog and UVM.
Stackforce AI infers this person is a VLSI Verification Engineer with expertise in IP verification and functional verification methodologies.

Contact

Skills

Core Skills

Ip VerificationFunctional VerificationDigital Electronics

Other Skills

Code CoverageVerilogTest PlanningVerdiVcsDebuggingUniversal Verification Methodology (UVM)SystemVerilogLinuxC (Programming Language)Core JavaOracle SQL Developer

About

Verification Engineer with 3 years of hands-on experience in the VLSI domain, specializing in IP and subsystem verification. Skilled in SystemVerilog and the Universal Verification Methodology (UVM). Verified multiple complex designs including QSPI and eSPI IPs, with ongoing contributions to HSIO subsystem verification. Proficiency includes AMBA protocols (AXI, AHB, APB). This experience combines technical depth with practical problem-solving, facilitating identification of design corner-cases, construction of reusable UVM environments, and efficient achievement of verification closure.

Experience

3 yrs 6 mos
Total Experience
3 yrs 6 mos
Average Tenure
3 yrs 6 mos
Current Experience

Mediatek

Design Verification Engineer

Oct 2022Present · 3 yrs 6 mos · Bengaluru, Karnataka, India

  • Experienced in verifying multiple communication interface IPs such as QSPI, eSPI.
  • Currently working on HSIO verification.
Functional VerificationCode CoverageIP Verification

Maven silicon

Design And Verification

Feb 2022Oct 2022 · 8 mos · Bengaluru, Karnataka, India

  • Completed Training at Maven Silicon – Verilog, SystemVerilog, and UVM
Digital ElectronicsVerilog

Education

Mahatma Gandhi Institute of Technology

B.TECH — Electronics and Communications Engineering

Jan 2018Jan 2022

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